Signal Integrity and EMC Analysis of PCBs using the ANSYS Chip Package System Workflow Webinar
Shrinking timing and noise margins are the leading contributors to signal integrity and power integrity issues in electronic products. Engineering simulation tools can play a critical role in identifying signal integrity and EMC issues early in the design cycle for electronics applications. ANSYS has the simulation platform that enable signal integrity engineers to predict and improve the performance of high speed communication channels before any board is prototyped.
Learn how ANSYS electromagnetics and circuit simulation products predict EMI/EMC, signal integrity and power integrity issues, enabling design teams to optimize system performance prior to build and test. The impact on signal integrity of various structures in a high-speed channel will be examined.
Discover the design automation features in ANSYS solutions that enable you to import designs from popular layout tools and perform rigorous electromagnetics extraction coupled to full-circuit simulations."
Please join us for this 60 minute webinar on Friday 24th October 2016 at 3pm (BST), 4pm (CEST) to be introduced to the capabilities and applications of the ANSYS Chip Package System simulation workflow.
- * Introduction: the ANSYS Chip-Package-System design flow
- Cable and connector modeling
- * A real case: EMI of PCB to PCB connection
- Short Demo
- * Practical example: HDMI
- * Connector impedance mismatch and S:G-ratio
- Design rules (i.e. à development and deployment with simulation)
- This event is free to attend, but registration is essential
- Details on how to join the webinar will be emailed to you once registered.
For more information please visit: www.ansys.com/en-GB/About-ANSYS/Events/uk-16-10-24-ansys-chip-package-webinar, email email@example.com, or call 0114 281 8888
Event Type: Webinar
Location: On-line United Kingdom
Date: October 24, 2016